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searching for SSE3 9 found (165 total)

alternate case: sSE3

Chasys Draw IES (2,612 words) [view diff] exact match in snippet view article find links to article

assembly language. It runs on x86 processors and supports the MMX, SSE, SSE2, S-SSE3, and SSE4.1 instruction sets. Chasys Draw is a project that was started in
Open Watcom Assembler (1,090 words) [view diff] exact match in snippet view article find links to article
16-bit and 32-bit x86 instruction set including MMX, 3DNow!, SSE, SSE2, and SSE3. Support for PowerPC, Alpha AXP, MIPS, and SPARC V8 instruction sets is also
Open Watcom Assembler (1,090 words) [view diff] exact match in snippet view article find links to article
16-bit and 32-bit x86 instruction set including MMX, 3DNow!, SSE, SSE2, and SSE3. Support for PowerPC, Alpha AXP, MIPS, and SPARC V8 instruction sets is also
Points of the compass (1,880 words) [view diff] exact match in snippet view article find links to article
17° E SSE1/2S SbE1/2E SSE1/2S SbE1/2E 14+3/4 165° 56′ 15″ S 14° E SSE3/4S SbE1/4E SSE3/4S SbE1/4E 150/0 168° 45′ 00″ S 11° E SbE 15+1/4 171° 33′ 45″ S 08°
Register file (4,258 words) [view diff] exact match in snippet view article find links to article
cannot store some instruction independently. Some instruction from SSE2/SSE3/SSSE3 require this feature for integer operation, for example instruction
Motorola RAZR i (778 words) [view diff] exact match in snippet view article find links to article
threading (2 threads), single Penwell core, 568 Kb total cache (MMX, SSE, SSE2, SSE3, SSSE3, EM64T, NX/XD, HT, BPT) Memory: 1024 MB LPDDR2-800 RAM / 8192 MB ROM
Leibniz formula for π (1,511 words) [view diff] exact match in snippet view article find links to article
Tricentennial Tribute, World Scientific, p. 214, ISBN 9781848165267. Leibniz Formula in C, x86 FPU Assembly, x86-64 SSE3 Assembly, and DEC Alpha Assembly
Central processing unit (11,315 words) [view diff] exact match in snippet view article find links to article
vectors. See scalar (mathematics) and vector (geometric). Although SSE/SSE2/SSE3 have superseded MMX in Intel's general-purpose processors, later IA-32 designs
Night action at the Battle of Jutland (6,676 words) [view diff] exact match in snippet view article find links to article
stating without explanation that the German fleet was returning home on course SSE3/4E at 16 knots. Although in this case the information was entirely correct